1. Field of the Invention
The present invention generally relates to electronic circuits and, more specifically, to circuits comprising synchronous flip-flops. The present invention more specifically applies to the detection of a possible disturbance in a logic data processing path comprising one or several synchronous flip-flops, be this disturbance incidental or intentional.
2. Discussion of the Related Art
In many electronic circuits, synchronization flip-flops are used between logic gate blocks to create elements for storing values (for example, registers, counters, etc.). It is then desirable for the binary states manipulated by the flip-flops to be reliable. Now, incidental or intentional disturbances occurring on the electronic circuit (for example, voltage peaks, laser pulses, etc.) may affect the data manipulated by the synchronization flip-flops. Static and dynamic effects can be distinguished. Static effects essentially result from intentional disturbances (for example, laser attacks) and directly modify the internal state of a flip-flop without intervening on the rate of the signals. Dynamic effects cause an error in the capture of the datum at the input of a flip-flop and may result from incidental or intentional disturbances. Such dynamic effects are linked to the intrinsic characteristics of synchronization flip-flops which require that a datum be present at the data input long enough before a storage-triggering edge (setup time) and remain present long enough after this triggering edge (hold time). If a triggering signal (typically, a clock signal) is accelerated, or the datum is delayed, the acquisition may not respect the setup time. Delaying the clock signal or accelerating the datum may result in not respecting the hold time.
Such disturbances are particularly critical in electronic circuits manipulating data which are desired to be protected against an unauthorized access (for example, keys or ciphering algorithms or data meant to remain secret).